1. Field of the Invention
The present invention relates to IC (integrated circuits) packaging, and in particular to load boards for packaged IC testing.
2. Description of the Related Art
Various electronics packaging has been developed to accommodate diverse integrated circuits (IC). Simple packaging, such as dual in-line packaging (DIP) or plastic leaded chip carrier (PLCC), and sophisticated packaging, such as quad flat packaging (QFP) with dense leads, have been developed for different circuitries. For example, FIG. 1A shows an IC chip 16 packaged by quad flat packaging (QFP). There are leads 18 disposed along the four sides of the IC chip 16. The leads 18 on the IC chip 16 are usually formed in L-shaped or gullwing configurations as shown in FIG. 1B.
There are several types of quad flat packaging, such as plastic quad flat packaging (PQFP), low-profile QFP (LQFP) and thin QFP (TQFP). Plastic quad flat packaging (PQFP) is utilized in large scale or very large scale integrated circuit packaging. The leads of PQFP are thin, dense and usually over 100 in number.
The low-profile QFP (LQFP) is a low-profile and light-weight package designed for application-specific integrated circuits, digital signal processors, microprocessors, controllers, graphic processors, gate arrays, synchronous static random access memories (SSRAM), computer chipsets and mixed-signal devices.
Thin quad flat packaging (TQFP) provides a space-efficient packaging solution, resulting in smaller printed circuit board space requirements. Reduced height and body dimensions are ideal for space-conscious applications, such as PCMCIA cards and networking devices.
Package testing is the final point at which chips are tested to ensure function as designed before delivery.
Conventionally, a handler in a material handling system takes packaged IC chips from their carriers, loads them into testing sockets and sets the environmental temperature as specified. Each pin on the chip's package must be inserted into the socket coupled to a custom designed circuit board known as a DUT board or a load board. The load board is then coupled to a functional tester or automatic test equipment (ATE), which provides an interface to output electric signals from the pins of the packaged IC chips. The functional tester or automatic test equipment (ATE) is capable of functionally exercising all of the chip's designed features under software control. Any failure to meet the published specification is identified by the tester.
FIG. 2 shows a quad flat packaged (QFP) IC chip bonded to a conventional load board via a test socket as an interface apparatus. The leads 28 of an IC 26 packaged by quad flat packaging (QFP) are usually very small and dense. The leads 28 are inserted in socket holes (not shown) or electrically contacting the socket 24. The socket 24 is then electrically coupled to the load board 20 via the connecting units 22 for testing. A conventional test socket 24 with simple circuit layout provides an interface for electrical connection of the leads 28 and a load board 20.
A drawback is that each type of packaged IC chips requires a customized socket to couple to a corresponding load board.